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Showing all articles related to CMP for semiconductor manufacturing

Dow’s Asia CMP Center Celebrates Phase 4 Grand Opening

April 19, 2018

Cliff Chen welcomes guests to Dow’s Asia CMP Center Phase 4 Grand OpeningDow Electronic Materials is expanding manufacturing operations for the production of pads for chemical mechanical planarization (CMP). Read on to see photos from the grand opening ceremony.

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2018 Semiconductor Industry Outlook: Riding a Growth Trend

March 13, 2018

A businessman sits in a chair contemplating the semiconductor industry outlook.Dow’s Adam Manzonie gives his insight on what may extend the semiconductor industry’s growth in 2018. Overall product quality from material suppliers is key in 2018 to meet ever more stringent process control requirements.

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Dow Litho and CMP Experts to Present Research at SEMICON China’s CSTIC

March 09, 2018

A view of the Shanghai International Convention Center, host of CSTIC 2018During the China Semiconductor Technology International Conference (CSTIC), representatives from Dow will share research on two topics: patterning materials for advanced 193nm immersion lithography, and the relationship between pad and slurry in CMP process optimization.

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Nitta Haas Receives Siltronic's Long-Term Partner Award for Polishing Materials

October 30, 2017

Senior leaders from Siltronic AG present the Supplier of the Year award to representatives from Nitta Haas and Dow’s CMP Technologies business. One of the strongest endorsements of a company’s performance and product quality is through industry supplier awards. Dow is proud to announce that its joint venture Nitta Haas has received Siltronic's Long-Term Partner Award for polishing materials.

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Innovation in CMP: The IKONIC™ Polishing Pad Platform

August 29, 2017

IKONIC™ CMP polishing pads

The IKONIC™ polishing pad platform has been Dow’s biggest CMP portfolio expansion in recent years, an innovation in advanced pad technology targeting multiple CMP applications. In this interview, Colin Cameron discusses the technology and its value in the marketplace.

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2017 Outlook: Semiconductor Market Forecast Calls for Continued Collaboration

February 16, 2017

Business executives collaborate on a project in a conference room. This year’s semiconductor market forecast calls for continued industry collaboration.
The semiconductor market forecast is strong for 2017. Dow's Colin Cameron discusses market drivers and the value of continued collaboration in an editorial for Solid State Technology.

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Dow’s Taiwan CMP Team Honored with Occupational Safety and Health Award

December 13, 2016

Dow’s Taiwan team celebrates winning the 2016 Taiwan Occupational Safety and Health Award.

Dow Electronic Materials recently received the 2016 Taiwan Occupational Safety and Health Award for its Asia CMP Manufacturing and Technical Center. Read on for pictures from the award ceremony.

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Performance Gains in CMP Slurry for Advanced Semiconductor Nodes

December 07, 2016

Scientist

In a recent Solid State Technology article, Dow authors report on some of the complexities in chemical mechanical planarization (CMP) processes at advanced semiconductor nodes. Dow’s new OPTIPLANE™ slurry platform demonstrates excellent performance in meeting new process needs.

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Technology Spotlight: IKONIC™ 4100 Polishing Pads, R&D 100 Awards Finalist

November 01, 2016

Technology Spotlight: IKONIC™ 4100 Polishing Pads, Finalist for the R&D 100 Awards

The IKONIC™ 4100 CMP pad series is a finalist for the 2016 R&D 100 Awards. Hear from our in-house experts about this innovative technology and how it is used in advanced chemical mechanical planarization (CMP). This is part two in a series profiling the R&D 100 Award Finalists from Dow Electronic Materials.

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CMP Solutions for 10nm and Beyond

October 04, 2016

A silicon wafer. At the 10 nanometer node and other future nodes, new CMP solutions will be needed to meet manufacturing requirements

As manufacturers plan for 10nm and future nodes, requirements for chemical mechanical planarization (CMP) defect levels become increasingly challenging. Due to the stringent CMP requirements for front-end planarization of finFET devices, new materials will be needed to achieve high planarization efficiency and low defect rates, ensuring reliable CMP for the next generation of finFET devices.

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