Dow Electronic Materials

Advanced Via Fill for HDI Applications

August 01, 2017

As we discussed in a 2016 blog post, copper via fill technology has progressed through multiple generations over the past 20 years in response to demand from the portable electronics market. The latest generation of via fill materials promises reduced cost and processing time while creating reliable vias for thin printed circuit boards (PCBs). This fifth-generation process, MICROFILL™ EVF-II, combines the best features of all previous generations of copper via fill chemistry.

ViaFillGenerally speaking, there are two major via filling processes used for high-density interconnect (HDI) applications in PCB manufacturing:

  • Via filling for every layer interconnection (ELIC) HDI:
    This process is primarily used in build-up layers. When plating on build-up layers, the focus is on how to deliver excellent blind micro via (BMV) filling because there is no through hole (TH) here.
  • Via filling for general HDI:
    Unlike ELIC HDI with only BMVs, general HDI combines both BMV and TH. The challenge of this process is to not only plate copper on BMVs, but also on THs. To meet market needs for next-generation HDI boards, the key to success is how to deliver a well-balanced via filling process with excellent BMV filling and throwing power (TP) on TH simultaneously.

Designed for the general HDI process, EVF-II builds on the performance of earlier generation EVF products, while continuously innovating to deliver a better balance between via filling on BMV and TP on TH. In this way, it meets the market needs for next-generation HDI PCB with its enhanced performance.

TP is an important metric for HDI PCB. It is calculated as the ratio between the plating thickness in a via and that on the surface. Greater TP translates to thinner copper on the top surface. The EVF-II process with high TP reduces cost of ownership in multiple ways:

  1. Copper is required to properly fill a via.
  2. Plating time is reduced, increasing throughput.
  3. Flash copper plating is no longer required, streamlining the process.

The traditional process flow for copper via fill involves electroless copper plating and flash copper electroplating prior to via filling. The newest technology removes the need for the flash copper step to achieve reliable via fill, saving materials, energy, water, and processing time.

High TP is especially important for high density interconnect (HDI) substrates, like the PCBs used in smart phones. HDI substrates typically contain many microvias, plus through holes with high aspect ratios. Blind and buried vias are on the order of 100 µm wide and equally deep. Through holes are typically 0.15 to 0.25 mm in width on a 1-mm-thick substrate.


Figure 1. Thowing power performance of EVF-II is 85% (L), compared to 80% for conventional product/EVF (R).

Adding the right balance of additives to a copper plating bath improves TP. Brighteners, carriers, and levelers all play an important role. By optimizing the plating chemistry, Dow has been able to reduce surface plating thickness by about 15%. This reduction is achieved while improving void issue in via fill, which is critical for reliable connections.


Figure 2. Decrease in plating thickness with improved via fill chemistry, via size of 100 x 125 um. EVF-II is on the left, EVF-I is on the right.

Customers are already using Dow’s fifth-generation via fill chemistry with consistent results. Filled vias pass industry-standard reliability metrics, including meeting tensile strength and elongation requirements and passing thermal shock testing. Via filling is equally reliable across a wide range of current densities, which makes the plating bath chemistry compatible with varying customer requirements.

The smart phone market has been the primary driver behind the need for improved via fill for HDI substrates. This market will continue to be critical, but emerging applications will also benefit from state-of-the-art copper plating processes. HDI substrates are required for products such as smart watches, smart devices in the home, and self-driving vehicles. As these applications grow in importance, via fill processes may need to advance to meet the demand of the latest generation of electronic devices. Dow intends to remain on the cutting edge with continuous innovation in copper via fill chemistry.