Interview with Colin Cameron, Global Pads Business Director for CMP Technologies
As the semiconductor manufacturing industry continues to advance, continuous innovation is required from all parts of the manufacturing process. Dow’s next-generation IKONIC™ polishing pad platform has been designed to bring exceptional performance in chemical mechanical planarization (CMP) processes. The new IKONIC™ pad platform offers a series of advanced pads for CMP designed to deliver high performance levels for a broad range of CMP applications.
In this interview, we talk to Colin Cameron, Global Pads Business Director, CMP Technologies, to take a more in-depth look at the IKONIC™ pad family and gain insights of some current industry issues related to CMP.
Q: Can you describe the IKONIC™ pad platform?
A: The IKONIC™ polishing pad platform has been our biggest CMP portfolio expansion in recent years, bringing to market Dow's most advanced pad technology targeting multiple CMP applications. Through the IKONIC™ platform, we are able to offer our customers polishing pads with a wide range of material properties designed to deliver high performance levels for a broad range of CMP applications. Pads in this platform support both the complexities of advanced technology nodes as well as the cost of ownership improvement needs at mature nodes.
Q: What are the benefits of this platform?
A: The benefits customers can gain depend on their needs for each CMP application. Dow's IKONIC™ pad platform is a family of products designed to deliver multiple benefits in copper, tungsten, interlayer dielectric (ILD), shallow trench isolation (STI) and other polishing applications. Its formulations combine a distinct set of chemistries with a range of hardness and porosity, creating pads that are easy to condition, thus allowing for enhanced texture.
When we designed the IKONIC™ pad platform, we developed offerings that will reduce defects and improve planarization efficiency, leading to increased wafer yields for manufacturers. The technology also has the potential to increase removal rate and extend pad lifetime, leading to cost of ownership gains. These benefits make IKONIC™ CMP pads an excellent choice for a wide range of polishing applications.
Q: Was this something that you saw as a need in the marketplace?
A: Yes, we saw that chip manufacturers needed options that offer better quality and consistency, lower defectivity, and reductions in cost of ownership. The ‘one-size-fits-all’ approach to CMP polishing is no longer viable, so we are offering a tunable platform of products that can both meet our customers’ ever-evolving technical requirements, and help them with improvements in cost of ownership.
Q: Why is new CMP technology needed for advanced nodes?
A: As device technology continues to move to smaller technology nodes, there is a continuous need to advance the capabilities of CMP consumables to meet increasingly stringent requirements in planarization, defectivity and uniformity. New and emerging device configurations such as FinFET and 3D memory introduce new materials and new challenges that are not easily solved using existing technology. New materials, complex interactions with CMP variables, and the need to control uniformity within 10Å across a 300mm wafer (equivalent to 1 hair width variation on a football field) present a need for continuous advancement in CMP product capabilities.
Dow is committed to collaborating with our customers to address these emerging market requirements. The IKONIC™ series of CMP polishing pads represents this commitment, delivering a tunable platform of products that meet a wide array of process needs.
Q: You also mentioned cost of ownership as an influencing factor. What do you mean by cost of ownership improvements?
A: Chip manufacturers are producing wafers at enormous scales, so they’re understandably looking for ways to decrease their overall costs. Looking at total cost of ownership means considering both the direct and indirect costs of their manufacturing process—supplies, labor, maintenance, equipment lifetime, tool uptime, and so on. Within the IKONIC™ pad platform, we can recommend pads that perform at higher levels for their processes.
As I mentioned earlier, CMP pads can deliver better defectivity and better planarization efficiency. That means less scrap and better wafer yields. We’ve also developed offerings with increases in removal rate, which leads to longer pad lifetimes. With our team’s vast expertise in materials science, polishing, manufacturing and high volume supply, we’ve been able to introduce a variety of cost of ownership improvements.
Q: Can you talk a little bit about your research and development process? How did you come to develop the IKONIC™ pad platform?
A: It always starts with the needs of our customers. We already discussed some of the specific requirements that have been emerging with advanced and mature nodes. Our research and development teams were able to design the IKONIC™ pad platform to meet these needs by drawing on our experience in materials science, polishing, manufacturing and high volume supply. These capabilities, combined with collaborative customer relationships, have continued to make Dow a trusted leader for innovations in CMP pad technology, both for advanced processes and to offer improvements to mature node processes.
Q: What were the first IKONIC™ pads to be introduced?
A: The first two families of the IKONIC™ polishing pad series launched in early 2013. IKONIC™ 2000 polishing pads target copper barrier polishing and other processes requiring soft and ultra-soft pads. The 2000 series is designed to deliver significant reduction in wafer defects, tunable removal rates, and longer pad lifetime.
IKONIC™ 3000 polishing pads target bulk copper polishing and other processes requiring medium hardness pads. The 3000 series is designed to reduce wafer defects, improve topography, and lower the customer's cost of ownership.
Figure 1: IKONIC™ CMP Polishing Pads
Q: Have other IKONIC™ pads been commercialized since that time?
A: Yes, more recently, we introduced the IKONIC™ 4000 series of polishing pads. The IKONIC™ 4000 series delivers significantly lower defects in the most advanced Logic and Memory technology nodes. IKONIC™ 4000 pads have been adopted at extremely sensitive CMP processes, starting with ceria polish applications, followed by copper bulk polishing, and many others.
In copper bulk polishing, IKONIC™ 4000 pads deliver improved defectivity and topography over existing offerings. In addition to delivering step-out performance, we have also been focusing our efforts on designing pads that can help reduce cost of ownership for our customers. Within the IKONIC™ 4000 pad series, we have introduced technologies with increased removal rates, which can subsequently extend pad lifetimes and/or reduce slurry consumption volume, which ultimately has a positive impact on total cost of ownership for our customers.
Q: So it’s been four years since the first IKONIC™ CMP pads became commercially available. Has the technology been successful?
A: Yes, we think so. Many of our customers, especially those at advanced nodes, were really looking for a new technology that could bring improvements to their manufacturing processes. IKONIC™ pads have been consistently delivering on the benefits I described earlier: better defectivity, better planarization efficiency, and better removal rates, all of which lead to process improvements for our customers. We’ve received a lot of great feedback from customers using IKONIC™ pads in their IC fabrication processes, and that’s the most important measure of success.
Editor's Note: The IKONIC™ polishing pad platform has been twice recognized by R&D Magazine as a significant technology innovation. Both the IKONIC™ 2000 and 4100 pad platforms have been named R&D 100 Award finalists, one of the highest honors in the research and design community. See this interview with Bainian Qian and Satsuki Hatemata discussing our 2016 R&D 100 Awards finalist, the IKONIC™ 4100 series of polishing pads.